1. Field of the Invention
Embodiments of the invention relate to the field of semiconductor device fabrication. More particularly, the present invention relates to an apparatus and method for handling thin wafers in existing implantation and deposition processing tools.
2. Discussion of Related Art
Ion implantation is a process used to dope impurity ions into a semiconductor substrate to obtain desired device characteristics. In one implantation method, an ion beam is directed from an ion source chamber toward a substrate. The depth of implantation into the substrate is based on the ion implant energy and the mass of the ions generated in the source chamber. One or more ion species may be implanted at different energy and dose levels to obtain desired device structures.
The throughput of device fabrication depends heavily on the wafer handling tools used with ion implanters to achieve low cost manufacture of the desired semiconductor devices. The overall throughput of these devices is a function of both the processing time and the efficiency of automated wafer handling. Generally, wafer handling involves introduction of the wafers in a wafer carrier into the processing tool, transfer of the wafers from the wafer carrier to a processing station, return of the wafers to the wafer carrier following processing and removal of the wafer carrier from the processing tool. Such wafer handling systems usually include one or more load locks for transferring wafers to and from a vacuum process chamber. The wafer carrier may be a FOUP (Front Opening Unified Pod), which is a standardized wafer carrier utilized for transporting wafers in fabrication facilities, or a cassette.
With the increasing demand for smaller, higher performing and lower cost semiconductor devices, thin semiconductor wafers having thicknesses of less than 250 μm are being used. These thin wafers typically have diameters of 8″, 12″, 16″, etc. However, these thin wafers are less stable, less flat, prone to breaking and vulnerable to various stresses during processing all of which negatively impact device throughput. In particular, thin wafers have a non-planar, wavy profile when left unsupported. Thus, the thin wafers cannot be oriented for implantation which requires a flat surface for uniform doping. Existing electrostatic clamps used to retain and flatten these thin wafers on the platen do not work well since only low current may be employed resulting in low retention forces which may compromise desired implantation. In addition, thin wafers sag when placed in existing wafer carriers and the larger diameter wafers may break when housed in cassettes. This sagging may also limit the number of wafers that may be stacked in existing cassettes. Moreover, handling systems in current process tools do not accommodate these thin wafers which may slide off during transfer from, for example, a load lock to a process chamber or vice versa. Accordingly, there is a need to provide a support assembly for thin wafers in existing processing systems.